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RT-Thread RTOS
An open source embedded real-time operating system
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Parse **interrupts**, **interrupt-parent**, and **interrupt-map** into logical IRQ numbers for PIC overview / **rt_pic_***.
Header: **drivers/ofw_irq.h**. Source: **components/drivers/ofw/irq.c**.
| Style | DTS | Typical use |
|---|---|---|
| Direct | **interrupts** + optional **interrupt-parent** | SoC device on GIC |
| Mapped | **interrupt-map** + **interrupt-map-mask** on bridge | PCI, AMBA behind nexus |
| API | Role |
|---|---|
**rt_ofw_irq_cells(np)** | **#interrupt-cells** of interrupt controller |
**rt_ofw_find_irq_parent** | Walk **interrupt-parent**; returns parent **np** and cell count |
**rt_ofw_parse_irq_cells(np, index, &args)** | Parse **interrupts** entry → **rt_ofw_cell_args** |
**rt_ofw_parse_irq_map(np, &args)** | Match **interrupt-map** row for this device |
**rt_ofw_map_irq(&args)** | Final logical IRQ number via PIC layer |
**rt_ofw_get_irq_count** | Number of interrupt specifiers |
**rt_ofw_get_irq(np, index)** | Convenience: parse + map in one call |
**rt_ofw_get_irq_by_name** | **interrupt-names** lookup |
For multiple IRQs, loop **rt_ofw_get_irq(np, i)** or use **interrupt-names**.
Each map entry contains (per spec comment in **irq.c**):
#address-cells** of bridge)#interrupt-cells** of bridge)interrupt-parent** phandle**interrupt-map-mask** masks bits before compare. PCI host bridges are the common case — see also PCI and device tree.
| Issue | Mitigation |
|---|---|
Missing **interrupt-parent** | Must inherit from bus or use **interrupt-map** |
Using **rt_ofw_get_irq** on PCI endpoint | Often need **parse_irq_map** first |
| Cell count mismatch | Verify parent **#interrupt-cells** |
| IRQ vs trigger type | Specifier may include flags — pass full **irq_args** to PIC driver |